Internal computational limit when running ArduPlane SITL

When building and running the SITL for ArduPlane, are the onboard computational limits of typical RC planes taken into account?

For instance, if I were to modify the build source code to execute CPU-intensive calculations while the vehicle is flying, would the SITL architecture consider potential computational/memory issues and would the build fail?

Or if there is no consideration of computational effort, is SITL based entirely on the computer I run it on? For instance, if I make a complex build but have a powerful PC, would the loop still function correctly in real-time?

Yeah SITL doesn’t have a setting to take those sorts of computational limits into account.

There are things to model hardware comms delays “a bit” and parameters for environmental effects such as wind.

What you are talking about would really need to be on as hardware in the loop (HIL) simulation. There is work to bring that back but it hasn’t made its way into master yet. There is also work to create some better hardware cpu profiling tools.