Internal errors 0X800 L : 240

I made a F405 circuit board myself. After flashing the firmware, you can connect to the computer and flash the firmware normally (F405WING, MATEK). But after running for a period of time (about 5 minutes) an internal error pops up in the message box: internal errors 0X800 L: 240
I don’t know the reason for this error. So there is no solution for the time being. Would you like to ask if you have encountered this error? If you can help, thank you very much.

I have not edited the program.

Version: 4.1.0-dev
Error: internal errors 0X800 L: 240 WDG:T0 SL0 FL123 FT3 FAE000ED38 FTP

10 PWM

The following is the PCB drawing

that is a watchdog reset. “4.1.0-dev” version is not latest. Please see if it reproduces with the latest firmware from
and then reproduce with LOG_DISARMED=1 and you will get a log after the watchdog reset. Please make that log available

The DIY circuit board MPU6000-int pin is not properly connected to the PC4 pin of the STM32F405 microcontroller. I will re-make the circuit board and check whether the fault will occur. thank you for your help

There is no SD card slot on the circuit board. I can’t get the log.

After I improve the int pin of the circuit board, the fault will still appear.
(After using the latese firmware)
The fault will occur after a period of operation, which may be several minutes or hours

The fault also occurred in the flight today, and the flight control did not restart,

But it seems to be related to the receiver of crsf. The following is the information received through data transmission.

2021/9/6 16:43:04 : CRSF: running on non-DMA serial port
2021/9/6 16:43:05 : CRSF: requesting RX device info
2021/9/6 16:43:05 : EKF3 IMU0 buffs IMU=19 OBS=7 OF=17 EN:17 dt=0.0200
2021/9/6 16:43:05 : CRSF: RX device ping failed
2021/9/6 16:43:08 : CRSFv2: RF mode 2, rate is 41Hz
2021/9/6 16:43:09 : GPS 1: detected as u-blox at 230400 baud
2021/9/6 16:43:10 : EKF3 IMU0 initialised
2021/9/6 16:43:12 : EKF3 IMU0 tilt alignment complete
2021/9/6 16:43:12 : WDG: T-3 SL0 FL0 FT0 FA0 FTP0 FLR0 FICSR0 MM0 MC0
2021/9/6 16:43:12 : IE0 IEC0 TN:
2021/9/6 16:43:20 : EKF3 IMU0 origin set
2021/9/6 16:43:20 : AHRS: EKF3 active
2021/9/6 16:43:22 : WDG: T-3 SL0 FL0 FT0 FA0 FTP0 FLR0 FICSR0 MM0 MC0

I have same problem with fc rcharlance f405 based