How to set ImmersionRC Tramp VTX configuration?

Add debug prints, and log(with/without VTX powered on) shows there is an issue.

tramp.log (6.3 KB)

TRAMP: send command ‘r’: 0
TRAMP: packet not complete 15/‘16’
TRAMP: packet complete 16/‘16’
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0
TRAMP: state 0 receive_pos 1 char 0

// returns completed response code or 0
char AP_Tramp::receive_response()
{
if (port == nullptr) {
return 0;
}

// wait for complete packet
const uint16_t bytesNeeded = TRAMP_BUF_SIZE - receive_pos;
if (port->available() < bytesNeeded) {
    debug("packet not complete %u/'%u'", unsigned(port->available()), unsigned(bytesNeeded));
    return 0;
}

debug("packet complete %u/'%u'", unsigned(port->available()), unsigned(bytesNeeded));

// sanity check
if (bytesNeeded == 0) {
    debug("packet sanity %u", unsigned(port->available()));
    reset_receiver();
    return 0;
}

for (uint16_t i = 0; i < bytesNeeded; i++) {
    const int16_t b = port->read();
    if (b < 0) {
        debug("data sanity fail");
        // uart claimed bytes available, but there were none
        return 0;
    }
    const uint8_t c = uint8_t(b);
    response_buffer[receive_pos++] = c;
    debug("state %u receive_pos %u char %u", unsigned(receive_state), unsigned(receive_pos), unsigned(c));

    switch (receive_state) {
    case ReceiveState::S_WAIT_LEN: {
        if (c == 0x0F) {
            // Found header byte, advance to wait for code
            receive_state = ReceiveState::S_WAIT_CODE;
        } else {
            // Unexpected header, reset state machine
            reset_receiver();
        }
        break;
    }
    case ReceiveState::S_WAIT_CODE: {
        if (c == 'r' || c == 'v' || c == 's') {
            // Code is for response is one we're interested in, advance to data
            receive_state = ReceiveState::S_DATA;
        } else {
            // Unexpected code, reset state machine
            reset_receiver();
        }
        break;
    }
    case ReceiveState::S_DATA: {
        if (receive_pos == TRAMP_BUF_SIZE) {
            // Buffer is full, calculate checksum
            const uint8_t cksum = checksum(response_buffer);

            // Reset state machine ready for next response
            reset_receiver();

            if ((response_buffer[TRAMP_BUF_SIZE-2] == cksum) && (response_buffer[TRAMP_BUF_SIZE-1] == 0)) {
                // Checksum is correct, process response
                const char r = handle_response();

                // Check response valid else keep on reading
                if (r != 0) {
                    return r;
                }
            }
        }
        break;
    }
    default:
        // Invalid state, reset state machine
        reset_receiver();
        break;
    }
}

return 0;

}