/* generated hardware definitions from hwdef.dat - DO NOT EDIT */ #pragma once #ifndef TRUE #define TRUE 1 #endif #ifndef FALSE #define FALSE 0 #endif #define MHZ (1000U*1000U) #define KHZ (1000U) #define AP_SIGNED_FIRMWARE 0 #define HAL_ENABLE_DFU_BOOT FALSE #define CHIBIOS_BOARD_NAME "BlitzF7" // MCU type (ChibiOS define) #define STM32F7xx_MCUCONF #define STM32F745_MCUCONF #define STM32F745xx // crystal frequency #define STM32_HSECLK 8000000U // UART used for stdout (printf) #define HAL_USE_SDC FALSE #define STM32_USB_USE_OTG1 TRUE #define HAL_USE_USB TRUE #define HAL_USE_SERIAL_USB TRUE #ifndef STM32F7 #define STM32F7 1 #endif #define HAL_USE_HW_RNG FALSE #define HAL_PROCESS_STACK_SIZE 0x1C00 #define HAL_STORAGE_SIZE 16384 #define STORAGE_FLASH_PAGE 1 #define HAL_BUZZER_PIN 80 #define HAL_BUZZER_ON 1 #define HAL_BUZZER_OFF 0 #define HAL_SERIAL3_PROTOCOL SerialProtocol_RCIN #define HAL_BATT_VOLT_PIN 13 #define HAL_BATT_CURR_PIN 12 #define HAL_BATT_VOLT_SCALE 10.9 #define HAL_BATT_CURR_SCALE 100 #define HAL_BATT_MONITOR_DEFAULT 4 #define STM32_I2C_USE_DMA FALSE #define HAL_LOGGING_DATAFLASH_ENABLED 1 #define HAL_BARO_ALLOW_INIT_NO_BARO 1 #define ALLOW_ARM_NO_COMPASS #define HAL_I2C_INTERNAL_MASK 0 #define STM32_PWM_USE_ADVANCED TRUE #define HAL_GENERATOR_ENABLED 0 #define AC_OAPATHPLANNER_ENABLED 0 #define AC_PRECLAND_ENABLED 0 #define AP_OPTICALFLOW_ENABLED 0 #define AP_ICENGINE_ENABLED 0 #define HAL_BARO_WIND_COMP_ENABLED 0 #define HAL_DEFAULT_INS_FAST_SAMPLE 1 #define BOARD_FLASH_SIZE 1024 // location of loaded firmware #define FLASH_LOAD_ADDRESS 0x08018000 #define EXT_FLASH_SIZE_MB 0 #define EXT_FLASH_RESERVE_START_KB 0 #define EXT_FLASH_RESERVE_END_KB 0 #define CRT0_AREAS_NUMBER 1 #define CRT1_RAMFUNC_ENABLE FALSE #define AP_CRASHDUMP_ENABLED 0 // memory regions #define HAL_MEMORY_REGIONS {(void*)0x20010000, 0x00040000, 0x00 }, {(void*)0x20000000, 0x00010000, 0x01 } #define HAL_CC_MEMORY_REGIONS {0x20010000, 0x20050000, CRASH_CATCHER_BYTE }, {0x20000000, 0x20010000, CRASH_CATCHER_BYTE } #define HAL_MEMORY_TOTAL_KB 320 #define HAL_RAM0_START 0x20010000 // CPU serial number (12 bytes) #define UDID_START UID_BASE // APJ board ID (for bootloaders) #define APJ_BOARD_ID 1026 #ifndef HAL_ENABLE_THREAD_STATISTICS #define HAL_ENABLE_THREAD_STATISTICS FALSE #endif #ifndef HAL_HAVE_HARDWARE_DOUBLE #define HAL_HAVE_HARDWARE_DOUBLE 0 #endif #define HAL_EXPECTED_SYSCLOCK 216000000 #define STM32_DMA_REQUIRED TRUE #ifndef HAL_FLASH_PROTECTION #define HAL_FLASH_PROTECTION 0 #endif #define HAL_SPI1_CONFIG { &SPID1, 1, STM32_SPI_SPI1_DMA_STREAMS } #define HAL_SPI2_CONFIG { &SPID2, 2, STM32_SPI_SPI2_DMA_STREAMS } #define HAL_SPI3_CONFIG { &SPID3, 3, STM32_SPI_SPI3_DMA_STREAMS } #define HAL_SPI4_CONFIG { &SPID4, 4, STM32_SPI_SPI4_DMA_STREAMS } #define HAL_SPI_BUS_LIST HAL_SPI1_CONFIG,HAL_SPI2_CONFIG,HAL_SPI3_CONFIG,HAL_SPI4_CONFIG // SPI device table #define HAL_SPI_DEVICE0 SPIDesc("dataflash" , 2, 1, PAL_LINE(GPIOA,15U), SPIDEV_MODE3, 104*MHZ, 104*MHZ) #define HAL_SPI_DEVICE1 SPIDesc("bmi270" , 0, 1, PAL_LINE(GPIOA,4U) , SPIDEV_MODE3, 10*MHZ, 10*MHZ) #define HAL_SPI_DEVICE_LIST HAL_SPI_DEVICE0,HAL_SPI_DEVICE1 #define HAL_WITH_SPI_DATAFLASH 1 #define HAL_WITH_SPI_BMI270 1 #define STM32_QSPI_NO_RESET TRUE // ADC config #define HAL_ANALOG_PINS { \ { 12, 3.30/4096 }, /* PC2 BATT_CURRENT_SENS */ \ { 13, 3.30/4096 }, /* PC3 BATT_VOLTAGE_SENS */ \ { 15, 3.30/4096 }, /* PC5 RSSI_ADC */ \ } // GPIO config #define HAL_GPIO_LINE_GPIO50 PAL_LINE(GPIOB,4U) #define HAL_GPIO_LINE_GPIO51 PAL_LINE(GPIOB,5U) #define HAL_GPIO_LINE_GPIO52 PAL_LINE(GPIOB,1U) #define HAL_GPIO_LINE_GPIO53 PAL_LINE(GPIOB,0U) #define HAL_GPIO_LINE_GPIO54 PAL_LINE(GPIOA,8U) #define HAL_GPIO_LINE_GPIO80 PAL_LINE(GPIOD,15U) #define HAL_GPIO_LINE_GPIO90 PAL_LINE(GPIOC,13U) #define HAL_GPIO_PINS { \ { 50, true, 1, PAL_LINE(GPIOB,4U)}, /* PB4 TIM3_CH1 TIM3 AF2 PWM1 */ \ { 51, true, 2, PAL_LINE(GPIOB,5U)}, /* PB5 TIM3_CH2 TIM3 AF2 PWM2 */ \ { 52, true, 3, PAL_LINE(GPIOB,1U)}, /* PB1 TIM3_CH4 TIM3 AF2 PWM3 */ \ { 53, true, 4, PAL_LINE(GPIOB,0U)}, /* PB0 TIM3_CH3 TIM3 AF2 PWM4 */ \ { 54, true, 5, PAL_LINE(GPIOA,8U)}, /* PA8 TIM1_CH1 TIM1 AF1 PWM5 */ \ { 80, true, 0, PAL_LINE(GPIOD,15U)}, /* PD15 BUZZER OUTPUT */ \ { 90, true, 0, PAL_LINE(GPIOC,13U)}, /* PC13 LED0 OUTPUT */ \ } // full pin define list #define HAL_GPIO_PIN_BATT_CURRENT_SENS PAL_LINE(GPIOC,2U) #define HAL_GPIO_PIN_BATT_VOLTAGE_SENS PAL_LINE(GPIOC,3U) #define HAL_GPIO_PIN_BUZZER PAL_LINE(GPIOD,15U) #define HAL_GPIO_PIN_FLASH1_CS PAL_LINE(GPIOA,15U) #define HAL_GPIO_PIN_GYRO1_CS PAL_LINE(GPIOA,4U) #define HAL_GPIO_PIN_I2C1_SCL PAL_LINE(GPIOB,8U) #define HAL_GPIO_PIN_I2C1_SDA PAL_LINE(GPIOB,9U) #define HAL_GPIO_PIN_I2C1_SCL PAL_LINE(GPIOB,8U) #define HAL_GPIO_PIN_LED0 PAL_LINE(GPIOC,13U) #define HAL_GPIO_PIN_OSD1_CS PAL_LINE(GPIOE,4U) #define HAL_GPIO_PIN_OTG_FS_DM PAL_LINE(GPIOA,11U) #define HAL_GPIO_PIN_OTG_FS_DP PAL_LINE(GPIOA,12U) #define HAL_GPIO_PIN_RSSI_ADC PAL_LINE(GPIOC,5U) #define HAL_GPIO_PIN_SPI1_MISO PAL_LINE(GPIOA,6U) #define HAL_GPIO_PIN_SPI1_MOSI PAL_LINE(GPIOA,7U) #define HAL_GPIO_PIN_SPI1_SCK PAL_LINE(GPIOA,5U) #define HAL_GPIO_PIN_SPI2_MISO PAL_LINE(GPIOB,14U) #define HAL_GPIO_PIN_SPI2_MOSI PAL_LINE(GPIOB,15U) #define HAL_GPIO_PIN_SPI2_SCK PAL_LINE(GPIOB,13U) #define HAL_GPIO_PIN_SPI3_MISO PAL_LINE(GPIOC,11U) #define HAL_GPIO_PIN_SPI3_MOSI PAL_LINE(GPIOD,6U) #define HAL_GPIO_PIN_SPI3_SCK PAL_LINE(GPIOC,10U) #define HAL_GPIO_PIN_SPI4_MISO PAL_LINE(GPIOE,5U) #define HAL_GPIO_PIN_SPI4_MOSI PAL_LINE(GPIOE,6U) #define HAL_GPIO_PIN_SPI4_SCK PAL_LINE(GPIOE,2U) #define HAL_GPIO_PIN_TIM1_CH1 PAL_LINE(GPIOA,8U) #define HAL_GPIO_PIN_TIM3_CH1 PAL_LINE(GPIOB,4U) #define HAL_GPIO_PIN_TIM3_CH2 PAL_LINE(GPIOB,5U) #define HAL_GPIO_PIN_TIM3_CH3 PAL_LINE(GPIOB,0U) #define HAL_GPIO_PIN_TIM3_CH4 PAL_LINE(GPIOB,1U) #define HAL_GPIO_PIN_UART4_RX PAL_LINE(GPIOA,1U) #define HAL_GPIO_PIN_UART4_TX PAL_LINE(GPIOA,0U) #define HAL_GPIO_PIN_USART1_RX PAL_LINE(GPIOA,10U) #define HAL_GPIO_PIN_USART1_TX PAL_LINE(GPIOA,9U) #define HAL_GPIO_PIN_USART2_RX PAL_LINE(GPIOA,3U) #define HAL_GPIO_PIN_USART2_TX PAL_LINE(GPIOA,2U) #define HAL_GPIO_PIN_USART3_RX PAL_LINE(GPIOB,11U) #define HAL_GPIO_PIN_USART3_TX PAL_LINE(GPIOB,10U) #define HAL_INS_PROBE1 ADD_BACKEND(AP_InertialSensor_BMI270::probe(*this,hal.spi->get_device("bmi270"),ROTATION_ROLL_180_YAW_225)) #define INS_MAX_INSTANCES 1 #define HAL_INS_PROBE_LIST HAL_INS_PROBE1 #define HAL_BARO_PROBE1 ADD_BACKEND(AP_Baro_DPS310::probe(*this,GET_I2C_DEVICE(0,0x76))) #define HAL_BARO_PROBE_LIST HAL_BARO_PROBE1 // peripherals enabled #define STM32_I2C_USE_I2C1 TRUE #define STM32_USB_USE_OTG1 TRUE #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 TRUE #define STM32_SPI_USE_SPI4 TRUE #ifndef STM32_SERIAL_USE_UART4 #define STM32_SERIAL_USE_UART4 TRUE #endif #ifndef STM32_SERIAL_USE_USART1 #define STM32_SERIAL_USE_USART1 TRUE #endif #ifndef STM32_SERIAL_USE_USART2 #define STM32_SERIAL_USE_USART2 TRUE #endif #ifndef STM32_SERIAL_USE_USART3 #define STM32_SERIAL_USE_USART3 TRUE #endif // auto-generated DMA mapping from dma_resolver.py // Note: The following peripherals can't be resolved for DMA: ['TIM3_CH4', 'USART1_RX'] #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC1_DMA_CHAN 0 #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_SPI_SPI1_RX_DMA_CHAN 3 #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI1_TX_DMA_CHAN 3 #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) // shared SPI2_RX,USART3_TX #define STM32_SPI_SPI2_RX_DMA_CHAN 0 #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) // shared TIM3_CH1,SPI2_TX #define STM32_SPI_SPI2_TX_DMA_CHAN 0 #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_SPI_SPI3_RX_DMA_CHAN 0 #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_SPI_SPI3_TX_DMA_CHAN 0 #define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI4_RX_DMA_CHAN 4 #define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_SPI_SPI4_TX_DMA_CHAN 4 #define STM32_TIM_TIM1_UP_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_TIM_TIM1_UP_DMA_CHAN 6 #define STM32_TIM_TIM3_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) // shared TIM3_CH1,SPI2_TX #define STM32_TIM_TIM3_CH1_DMA_CHAN 5 #define STM32_TIM_TIM3_UP_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_TIM_TIM3_UP_DMA_CHAN 5 #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_TX_DMA_CHAN 4 #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_RX_DMA_CHAN 4 #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) // shared SPI2_RX,USART3_TX #define STM32_UART_USART3_TX_DMA_CHAN 4 // Mask of DMA streams which are shared #define SHARED_DMA_MASK ((1U<0) #endif // end firmware defaults