/* generated hardware definitions from hwdef.dat - DO NOT EDIT */ #pragma once #ifndef TRUE #define TRUE 1 #endif #ifndef FALSE #define FALSE 0 #endif #define MHZ (1000U*1000U) #define KHZ (1000U) // MCU type (ChibiOS define) #define STM32F4xx_MCUCONF #define STM32F405_MCUCONF #define STM32F405xx // crystal frequency #define STM32_HSECLK 8000000U // UART used for stdout (printf) #define HAL_USE_SDC FALSE #define STM32_USB_USE_OTG1 TRUE #define HAL_USE_USB TRUE #define HAL_USE_SERIAL_USB TRUE #define HAL_USE_HW_RNG FALSE #define HAL_PROCESS_STACK_SIZE 0x1C00 #define STM32_VDD 330U #define STM32_ST_USE_TIMER 4 #define CH_CFG_ST_RESOLUTION 16 #define HAL_GPIO_A_LED_PIN 1 #define HAL_BUZZER_PIN 80 #define HAL_BUZZER_ON 1 #define HAL_BUZZER_OFF 0 #define HAL_PROBE_EXTERNAL_I2C_BAROS #define HAL_BARO_ALLOW_INIT_NO_BARO #define ALLOW_ARM_NO_COMPASS #define HAL_COMPASS_DEFAULT HAL_COMPASS_NONE #define HAL_PROBE_EXTERNAL_I2C_COMPASSES #define HAL_I2C_INTERNAL_MASK 0 #define HAL_COMPASS_AUTO_ROT_DEFAULT 2 #define HAL_LOGGING_DATAFLASH #define HAL_STORAGE_SIZE 7168 #define HAL_BATT_VOLT_PIN 11 #define HAL_BATT_CURR_PIN 13 #define HAL_BATT_VOLT_SCALE 11 #define HAL_BATT_CURR_SCALE 17 #define BOARD_RSSI_ANA_PIN 1 #define OSD_ENABLED 1 #define HAL_OSD_TYPE_DEFAULT 1 #define BOARD_FLASH_SIZE 1024 #define CRT1_AREAS_NUMBER 1 // location of loaded firmware #define FLASH_LOAD_ADDRESS 0x0800c000 #define EXTERNAL_PROG_FLASH_MB 0 #define CRT1_RAMFUNC_ENABLE FALSE #define STORAGE_FLASH_PAGE 1 #define HAL_CRASHDUMP_ENABLE 0 // memory regions #define HAL_MEMORY_REGIONS {(void*)0x20000000, 0x00020000, 0x01 }, {(void*)0x10000000, 0x00010000, 0x02 } #define HAL_CC_MEMORY_REGIONS {0x20000000, 0x20020000, CRASH_CATCHER_BYTE }, {0x10000000, 0x10010000, CRASH_CATCHER_BYTE } #define HAL_MEMORY_TOTAL_KB 192 #define HAL_RAM0_START 0x20000000 // CPU serial number (12 bytes) #define UDID_START UID_BASE // APJ board ID (for bootloaders) #define APJ_BOARD_ID 1060 #ifndef HAL_ENABLE_THREAD_STATISTICS #define HAL_ENABLE_THREAD_STATISTICS FALSE #endif #ifndef HAL_HAVE_HARDWARE_DOUBLE #define HAL_HAVE_HARDWARE_DOUBLE 0 #endif #define HAL_EXPECTED_SYSCLOCK 168000000 #define STM32_DMA_REQUIRED TRUE #define HAL_SPI1_CONFIG { &SPID1, 1, STM32_SPI_SPI1_DMA_STREAMS } #define HAL_SPI3_CONFIG { &SPID3, 3, STM32_SPI_SPI3_DMA_STREAMS } #define HAL_SPI_BUS_LIST HAL_SPI1_CONFIG,HAL_SPI3_CONFIG // SPI device table #define HAL_SPI_DEVICE0 SPIDesc("mpu6000" , 0, 1, PAL_LINE(GPIOB,12U), SPIDEV_MODE3, 1*MHZ, 4*MHZ) #define HAL_SPI_DEVICE1 SPIDesc("dataflash" , 1, 2, PAL_LINE(GPIOB,3U) , SPIDEV_MODE3, 32*MHZ, 32*MHZ) #define HAL_SPI_DEVICE2 SPIDesc("osd" , 1, 3, PAL_LINE(GPIOB,14U), SPIDEV_MODE0, 10*MHZ, 10*MHZ) #define HAL_SPI_DEVICE_LIST HAL_SPI_DEVICE0,HAL_SPI_DEVICE1,HAL_SPI_DEVICE2 #define HAL_WITH_SPI_MPU6000 1 #define HAL_WITH_SPI_DATAFLASH 1 #define HAL_WITH_SPI_OSD 1 // ADC config #define HAL_ANALOG_PINS { \ { 10, 3.30/4096 }, /* PC0 RSSI_IN */ \ { 12, 3.30/4096 }, /* PC2 BAT_CURR_SENS */ \ { 13, 3.30/4096 }, /* PC3 BAT_VOLT_SENS */ \ } // GPIO config #define HAL_GPIO_LINE_GPIO1 PAL_LINE(GPIOC,14U) #define HAL_GPIO_LINE_GPIO50 PAL_LINE(GPIOB,0U) #define HAL_GPIO_LINE_GPIO51 PAL_LINE(GPIOB,1U) #define HAL_GPIO_LINE_GPIO52 PAL_LINE(GPIOA,3U) #define HAL_GPIO_LINE_GPIO53 PAL_LINE(GPIOA,2U) #define HAL_GPIO_LINE_GPIO54 PAL_LINE(GPIOA,9U) #define HAL_GPIO_LINE_GPIO80 PAL_LINE(GPIOC,13U) #define HAL_GPIO_PINS { \ { 1, true, 0, PAL_LINE(GPIOC,14U)}, /* PC14 LED1 OUTPUT */ \ { 50, true, 1, PAL_LINE(GPIOB,0U)}, /* PB0 TIM3_CH3 TIM3 AF2 PWM1 */ \ { 51, true, 2, PAL_LINE(GPIOB,1U)}, /* PB1 TIM3_CH4 TIM3 AF2 PWM2 */ \ { 52, true, 3, PAL_LINE(GPIOA,3U)}, /* PA3 TIM5_CH4 TIM5 AF2 PWM3 */ \ { 53, true, 4, PAL_LINE(GPIOA,2U)}, /* PA2 TIM5_CH3 TIM5 AF2 PWM4 */ \ { 54, true, 5, PAL_LINE(GPIOA,9U)}, /* PA9 TIM1_CH2 TIM1 AF1 PWM5 */ \ { 80, true, 0, PAL_LINE(GPIOC,13U)}, /* PC13 BUZZER OUTPUT */ \ } // full pin define list #define HAL_GPIO_PIN_BAT_CURR_SENS PAL_LINE(GPIOC,2U) #define HAL_GPIO_PIN_BAT_VOLT_SENS PAL_LINE(GPIOC,3U) #define HAL_GPIO_PIN_BUZZER PAL_LINE(GPIOC,13U) #define HAL_GPIO_PIN_FLASH_CS PAL_LINE(GPIOB,3U) #define HAL_GPIO_PIN_I2C1_SCL PAL_LINE(GPIOB,8U) #define HAL_GPIO_PIN_I2C1_SDA PAL_LINE(GPIOB,9U) #define HAL_GPIO_PIN_I2C1_SCL PAL_LINE(GPIOB,8U) #define HAL_GPIO_PIN_LED1 PAL_LINE(GPIOC,14U) #define HAL_GPIO_PIN_MPU6000_CS PAL_LINE(GPIOB,12U) #define HAL_GPIO_PIN_OSD_CS PAL_LINE(GPIOB,14U) #define HAL_GPIO_PIN_OTG_FS_DM PAL_LINE(GPIOA,11U) #define HAL_GPIO_PIN_OTG_FS_DP PAL_LINE(GPIOA,12U) #define HAL_GPIO_PIN_RSSI_IN PAL_LINE(GPIOC,0U) #define HAL_GPIO_PIN_SPI1_MISO PAL_LINE(GPIOA,6U) #define HAL_GPIO_PIN_SPI1_MOSI PAL_LINE(GPIOA,7U) #define HAL_GPIO_PIN_SPI1_SCK PAL_LINE(GPIOA,5U) #define HAL_GPIO_PIN_SPI3_MISO PAL_LINE(GPIOC,11U) #define HAL_GPIO_PIN_SPI3_MOSI PAL_LINE(GPIOC,12U) #define HAL_GPIO_PIN_SPI3_SCK PAL_LINE(GPIOC,10U) #define HAL_GPIO_PIN_TIM1_CH2 PAL_LINE(GPIOA,9U) #define HAL_GPIO_PIN_TIM3_CH3 PAL_LINE(GPIOB,0U) #define HAL_GPIO_PIN_TIM3_CH4 PAL_LINE(GPIOB,1U) #define HAL_GPIO_PIN_TIM5_CH3 PAL_LINE(GPIOA,2U) #define HAL_GPIO_PIN_TIM5_CH4 PAL_LINE(GPIOA,3U) #define HAL_GPIO_PIN_UART4_RX PAL_LINE(GPIOA,1U) #define HAL_GPIO_PIN_UART4_TX PAL_LINE(GPIOA,0U) #define HAL_GPIO_PIN_USART1_RX PAL_LINE(GPIOA,10U) #define HAL_GPIO_PIN_USART1_TX PAL_LINE(GPIOB,6U) #define HAL_GPIO_PIN_USART2_RX PAL_LINE(GPIOD,6U) #define HAL_GPIO_PIN_USART2_TX PAL_LINE(GPIOD,5U) #define HAL_GPIO_PIN_USART3_RX PAL_LINE(GPIOB,11U) #define HAL_GPIO_PIN_USART3_TX PAL_LINE(GPIOB,10U) #define HAL_GPIO_PIN_USART6_RX PAL_LINE(GPIOC,7U) #define HAL_GPIO_PIN_USART6_TX PAL_LINE(GPIOC,6U) #define HAL_GPIO_PIN_VBUS PAL_LINE(GPIOC,5U) #define HAL_INS_PROBE1 ADD_BACKEND(AP_InertialSensor_Invensense::probe(*this,hal.spi->get_device("mpu6000"),ROTATION_YAW_180)) #define INS_MAX_INSTANCES 1 #define HAL_INS_PROBE_LIST HAL_INS_PROBE1 #define HAL_BARO_PROBE1 ADD_BACKEND(AP_Baro_BMP280::probe(*this,GET_I2C_DEVICE(0,0x76))) #define HAL_BARO_PROBE_LIST HAL_BARO_PROBE1 // peripherals enabled #define STM32_I2C_USE_I2C1 TRUE #define STM32_USB_USE_OTG1 TRUE #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI3 TRUE #ifndef STM32_SERIAL_USE_UART4 #define STM32_SERIAL_USE_UART4 TRUE #endif #ifndef STM32_SERIAL_USE_USART1 #define STM32_SERIAL_USE_USART1 TRUE #endif #ifndef STM32_SERIAL_USE_USART2 #define STM32_SERIAL_USE_USART2 TRUE #endif #ifndef STM32_SERIAL_USE_USART3 #define STM32_SERIAL_USE_USART3 TRUE #endif #ifndef STM32_SERIAL_USE_USART6 #define STM32_SERIAL_USE_USART6 TRUE #endif // auto-generated DMA mapping from dma_resolver.py #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC1_DMA_CHAN 0 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C1_RX_DMA_CHAN 1 #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) // shared TIM5_UP,I2C1_TX #define STM32_I2C_I2C1_TX_DMA_CHAN 1 #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_RX_DMA_CHAN 3 #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI1_TX_DMA_CHAN 3 #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_SPI_SPI3_RX_DMA_CHAN 0 #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI3_TX_DMA_CHAN 0 #define STM32_TIM_TIM1_UP_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_TIM_TIM1_UP_DMA_CHAN 6 #define STM32_TIM_TIM3_CH4_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) // shared TIM3_UP,TIM3_CH4 #define STM32_TIM_TIM3_CH4_DMA_CHAN 5 #define STM32_TIM_TIM3_UP_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) // shared TIM3_UP,TIM3_CH4 #define STM32_TIM_TIM3_UP_DMA_CHAN 5 #define STM32_TIM_TIM5_CH4_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) // shared USART3_TX,TIM5_CH4 #define STM32_TIM_TIM5_CH4_DMA_CHAN 6 #define STM32_TIM_TIM5_UP_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) // shared TIM5_UP,I2C1_TX #define STM32_TIM_TIM5_UP_DMA_CHAN 6 #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_UART4_TX_DMA_CHAN 4 #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART1_RX_DMA_CHAN 4 #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_TX_DMA_CHAN 4 #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_RX_DMA_CHAN 4 #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) // shared USART3_TX,TIM5_CH4 #define STM32_UART_USART3_TX_DMA_CHAN 4 #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_UART_USART6_RX_DMA_CHAN 5 #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) #define STM32_UART_USART6_TX_DMA_CHAN 5 // Mask of DMA streams which are shared #define SHARED_DMA_MASK ((1U<