I have an icm-20948 sensor and a stm32f411ccu6 microcontroller
I know that the Ardupilot for the entire project requires more than 1 MB of flash, I need to collect some examples, which take 300-400 kB when compiled.
I want to compile a couple of simple examples.
./waf build --target examples/AHRS_Test -v
./waf build --target examples/INS_generic -v
What I did was study the documentation
Porting to a new flight controller board — Dev documentation
and
ardupilot/libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat at master · ArduPilot/ardupilot · GitHub
Added the hwdef-bl.dat file to the folder
Arduino\libraries\ardupilot\libraries\AP_HAL_ChibiOS\hwdef\Stm32f411ccu6
The contents of the file hwdef-bl.dat are
# hw definition file for Stm32f411ccu6 hardware
# MCU class and specific type
# MCU STM32F4xx STM32F411xx
MCU STM32F4xx STM32F411xE
# board ID for firmware load
APJ_BOARD_ID 5502
# crystal frequency
OSCILLATOR_HZ 10000000
FLASH_SIZE_KB 512
# bootloader is installed at zero offset
FLASH_RESERVE_START_KB 64
# LEDs
PC13 LED_BOOTLOADER OUTPUT LOW
define HAL_LED_ON 2
# the location where the bootloader will put the firmware
FLASH_BOOTLOADER_LOAD_KB 64
# order of UARTs (and USB)
SERIAL_ORDER OTG1 USART1 USART2
# USART1
PA9 USART1_TX USART1
PA10 USART1_RX USART1
# alternative RC input using UART
PA2 USART2_TX USART2 NODMA
PA3 USART2_RX USART2 NODMA ALT(1)
PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1
# Add CS pins to ensure they are high in bootloader
PB10 FLASH_CS CS
I decided to start by compiling a bootloader.
./waf distclean
python3 ./Tools/scripts/build_bootloaders.py Stm32f411ccu6
Here I would like to immediately make a comment that when it was chosen like this:
MCU STM32F4xx STM32F411xx
Then the python script for creating a bootloader produced a lot of errors and for a long time I could not understand why, and then I found in this file
\ardupilot\modules\ChibiOS\os\common\ext\ST\STM32F4xx\stm32f4xx.h
this code
#elif defined(STM32F411xE)
#include "stm32f411xe.h"
Then added it to the folder
\ardupilot\libraries\AP_HAL_ChibiOS\hwdef\scripts
file STM32F411xE.py
#!/usr/bin/env python
'''
these tables are generated from the STM32 datasheets for the
STM32F41x
'''
# additional build information for ChibiOS
build = {
"CHIBIOS_STARTUP_MK" : "os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk",
"CHIBIOS_PLATFORM_MK" : "os/hal/ports/STM32/STM32F4xx/platform.mk"
}
# MCU parameters
mcu = {
# ram map, as list of (address, size-kb, flags)
# flags of 1 means DMA-capable
# flags of 2 means faster memory for CPU intensive work
'RAM_MAP' : [
(0x20000000, 256, 1), # main memory, DMA safe
],
'EXPECTED_CLOCK' : 100000000,
'DEFINES' : {
'STM32F4' : '1',
}
}
AltFunction_map = {
# format is PIN:FUNCTION : AFNUM
# extracted from tabula-AF-F405.csv
"PA0:ETH_MII_CRS" : 11,
"PA0:EVENTOUT" : 15,
"PA0:TIM2_CH1" : 1,
"PA0:TIM2_ETR" : 1,
"PA0:TIM5_CH1" : 2,
"PA0:TIM8_ETR" : 3,
"PA0:UART4_TX" : 8,
"PA0:USART2_CTS" : 7,
"PA10:DCMI_D1" : 13,
"PA10:EVENTOUT" : 15,
"PA10:OTG_FS_ID" : 10,
"PA10:TIM1_CH3" : 1,
"PA10:USART1_RX" : 7,
"PA11:CAN1_RX" : 9,
"PA11:EVENTOUT" : 15,
"PA11:OTG_FS_DM" : 10,
"PA11:TIM1_CH4" : 1,
"PA11:USART1_CTS" : 7,
"PA12:CAN1_TX" : 9,
"PA12:EVENTOUT" : 15,
"PA12:OTG_FS_DP" : 10,
"PA12:TIM1_ETR" : 1,
"PA12:USART1_RTS" : 7,
"PA13:EVENTOUT" : 15,
"PA13:JTMS-SWDIO" : 0,
"PA14:EVENTOUT" : 15,
"PA14:JTCK-SWCLK" : 0,
"PA15:EVENTOUT" : 15,
"PA15:JTDI" : 0,
"PA15:SPI1_NSS" : 5,
"PA15:SPI3_NSS" : 6,
"PA15:TIM2_CH1" : 1,
"PA15:TIM2_ETR" : 1,
"PA1:ETH_MII_RX_CLK" : 11,
"PA1:ETH_RMII__REF_CLK" : 11,
"PA1:EVENTOUT" : 15,
"PA1:TIM2_CH2" : 1,
"PA1:TIM5_CH2" : 2,
"PA1:UART4_RX" : 8,
"PA1:USART2_RTS" : 7,
"PA2:ETH_MDIO" : 11,
"PA2:EVENTOUT" : 15,
"PA2:TIM2_CH3" : 1,
"PA2:TIM5_CH3" : 2,
"PA2:TIM9_CH1" : 3,
"PA2:USART2_TX" : 7,
"PA3:ETH_MII_COL" : 11,
"PA3:EVENTOUT" : 15,
"PA3:OTG_HS_ULPI_D0" : 10,
"PA3:TIM2_CH4" : 1,
"PA3:TIM5_CH4" : 2,
"PA3:TIM9_CH2" : 3,
"PA3:USART2_RX" : 7,
"PA4:DCMI_HSYNC" : 13,
"PA4:EVENTOUT" : 15,
"PA4:OTG_HS_SOF" : 12,
"PA4:SPI1_NSS" : 5,
"PA4:SPI3_NSS" : 6,
"PA4:I2S3_WS" : 6,
"PA4:USART2_CK" : 7,
"PA5:EVENTOUT" : 15,
"PA5:OTG_HS_ULPI_CK" : 10,
"PA5:SPI1_SCK" : 5,
"PA5:TIM2_CH1" : 1,
"PA5:TIM2_ETR" : 1,
"PA5:TIM8_CH1N" : 3,
"PA6:DCMI_PIXCK" : 13,
"PA6:EVENTOUT" : 15,
"PA6:SPI1_MISO" : 5,
"PA6:TIM1_BKIN" : 1,
"PA6:TIM3_CH1" : 2,
"PA7:ETH_MII_RX_DV" : 11,
"PA7:ETH_RMII_CRS_DV" : 11,
"PA7:EVENTOUT" : 15,
"PA7:SPI1_MOSI" : 5,
"PA7:TIM14_CH1" : 9,
"PA7:TIM1_CH1N" : 1,
"PA7:TIM3_CH2" : 2,
"PA7:TIM8_CH1N" : 3,
"PA8:EVENTOUT" : 15,
"PA8:I2C3_SCL" : 4,
"PA8:MCO1" : 0,
"PA8:OTG_FS_SOF" : 10,
"PA8:TIM1_CH1" : 1,
"PA8:USART1_CK" : 7,
"PA9:DCMI_D0" : 13,
"PA9:EVENTOUT" : 15,
"PA9:I2C3_SMBA" : 4,
"PA9:TIM1_CH2" : 1,
"PA9:USART1_TX" : 7,
"PB0:ETH_MII_RXD2" : 11,
"PB0:EVENTOUT" : 15,
"PB0:OTG_HS_ULPI_D1" : 10,
"PB0:TIM1_CH2N" : 1,
"PB0:TIM3_CH3" : 2,
"PB10:ETH_MII_RX_ER" : 11,
"PB10:EVENTOUT" : 15,
"PB10:I2C2_SCL" : 4,
"PB10:OTG_HS_ULPI_D3" : 10,
"PB10:SPI2_SCK" : 5,
"PB10:I2S2_CK" : 5,
"PB10:TIM2_CH3" : 1,
"PB12:CAN2_RX" : 9,
"PB12:EVENTOUT" : 15,
"PB12:I2C2_SMBA" : 4,
"PB12:OTG_HS_ID" : 12,
"PB12:OTG_HS_ULPI_D5" : 10,
"PB12:SPI2_NSS" : 5,
"PB12:I2S2_WS" : 5,
"PB12:TIM1_BKIN" : 1,
"PB13:CAN2_TX" : 9,
"PB13:ETH_MII_TXD1" : 11,
"PB13:ETH_RMII_TXD1" : 11,
"PB13:EVENTOUT" : 15,
"PB13:OTG_HS_ULPI_D6" : 10,
"PB13:SPI2_SCK" : 5,
"PB13:I2S2_CK" : 5,
"PB13:TIM1_CH1N" : 1,
"PB14:EVENTOUT" : 15,
"PB14:I2S2EXT_SD" : 6,
"PB14:OTG_HS_DM" : 12,
"PB14:SPI2_MISO" : 5,
"PB14:TIM12_CH1" : 9,
"PB14:TIM1_CH2N" : 1,
"PB14:TIM8_CH2N" : 3,
"PB15:RTC_REFIN" : 0,
"PB15:TIM1_CH3N" : 1,
"PB15:TIM8_CH3N" : 3,
"PB15:SPI2_MOSI" : 5,
"PB15:I2S2_SD" : 5,
"PB15:TIM12_CH2" : 9,
"PB15:OTG_HS_DP" : 12,
"PB15:EVENTOUT" : 15,
"PB1:ETH_MII_RXD3" : 11,
"PB1:EVENTOUT" : 15,
"PB1:OTG_HS_ULPI_D2" : 10,
"PB1:TIM1_CH3N" : 1,
"PB1:TIM3_CH4" : 2,
"PB2:EVENTOUT" : 15,
"PB3:EVENTOUT" : 15,
"PB3:JTDO" : 0,
"PB3:SPI1_SCK" : 5,
"PB3:I2S3_CK" : 6,
"PB3:SPI3_SCK" : 6,
"PB3:TIM2_CH2" : 1,
"PB3:TRACESWO" : 0,
"PB4:EVENTOUT" : 15,
"PB4:I2S3EXT_SD" : 7,
"PB4:NJTRST" : 0,
"PB4:SPI1_MISO" : 5,
"PB4:SPI3_MISO" : 6,
"PB4:TIM3_CH1" : 2,
"PB5:CAN2_RX" : 9,
"PB5:DCMI_D10" : 13,
"PB5:ETH_PPS_OUT" : 11,
"PB5:EVENTOUT" : 15,
"PB5:I2C1_SMBA" : 4,
"PB5:OTG_HS_ULPI_D7" : 10,
"PB5:SPI1_MOSI" : 5,
"PB5:SPI3_MOSI" : 6,
"PB5:I2S3_SD" : 6,
"PB5:TIM3_CH2" : 2,
"PB6:CAN2_TX" : 9,
"PB6:DCMI_D5" : 13,
"PB6:EVENTOUT" : 15,
"PB6:I2C1_SCL" : 4,
"PB6:TIM4_CH1" : 2,
"PB6:USART1_TX" : 7,
"PB7:DCMI_VSYNC" : 13,
"PB7:EVENTOUT" : 15,
"PB7:FSMC_NL" : 12,
"PB7:I2C1_SDA" : 4,
"PB7:TIM4_CH2" : 2,
"PB7:USART1_RX" : 7,
"PB8:CAN1_RX" : 9,
"PB8:DCMI_D6" : 13,
"PB8:ETH_MII_TXD3" : 11,
"PB8:EVENTOUT" : 15,
"PB8:I2C1_SCL" : 4,
"PB8:SDIO_D4" : 12,
"PB8:TIM10_CH1" : 3,
"PB8:TIM4_CH3" : 2,
"PB9:CAN1_TX" : 9,
"PB9:DCMI_D7" : 13,
"PB9:EVENTOUT" : 15,
"PB9:I2C1_SDA" : 4,
"PB9:SDIO_D5" : 12,
"PB9:SPI2_NSS" : 5,
"PB9:I2S2_WS" : 5,
"PB9:TIM11_CH1" : 3,
"PB9:TIM4_CH4" : 2,
"PC13:EVENTOUT" : 15,
"PC14:EVENTOUT" : 15,
"PC15:EVENTOUT" : 15,
}
ADC1_map = {
# format is PIN : ADC1_CHAN
# extracted from tabula-addfunc-F405.csv
"PA0" : 0,
"PA1" : 1,
"PA2" : 2,
"PA3" : 3,
"PA4" : 4,
"PA5" : 5,
"PA6" : 6,
"PA7" : 7,
"PB0" : 8,
"PB1" : 9,
}
DMA_Map = {
# format is (DMA_TABLE, StreamNum, Channel)
# extracted from tabula-STM32F405-DMA.csv
"ADC1" : [(2,0,0),(2,4,0)],
"I2C1_RX" : [(1,0,1),(1,5,1)],
"I2C1_TX" : [(1,6,1),(1,7,1)],
"I2C2_RX" : [(1,2,7),(1,3,7)],
"I2C2_TX" : [(1,7,7)],
"I2C3_RX" : [(1,2,3)],
"I2C3_TX" : [(1,4,3)],
"I2S2_EXT_RX" : [(1,3,3)],
"I2S2_EXT_TX" : [(1,4,2)],
"I2S3_EXT_RX" : [(1,2,2),(1,0,3)],
"I2S3_EXT_TX" : [(1,5,2)],
"SDIO" : [(2,3,4),(2,6,4)],
"SPI1_RX" : [(2,0,3),(2,2,3)],
"SPI1_TX" : [(2,3,3),(2,5,3)],
"SPI2_RX" : [(1,3,0)],
"SPI2_TX" : [(1,4,0)],
"SPI3_RX" : [(1,0,0),(1,2,0)],
"SPI3_TX" : [(1,5,0),(1,7,0)],
"SPI4_RX" : [(2,0,4),(2,3,5)],
"SPI4_TX" : [(2,1,4),(2,4,5)],
"SPI5_RX" : [(2,3,2),(2,5,7)],
"SPI5_TX" : [(2,4,2),(2,6,7)],
"TIM1_CH1" : [(2,6,0),(2,1,6),(2,3,6)],
"TIM1_CH2" : [(2,6,0),(2,2,6)],
"TIM1_CH3" : [(2,6,0),(2,6,6)],
"TIM1_CH4" : [(2,4,6)],
"TIM1_COM" : [(2,4,6)],
"TIM1_TRIG" : [(2,0,6),(2,4,6)],
"TIM1_UP" : [(2,5,6)],
"TIM2_CH1" : [(1,5,3)],
"TIM2_CH2" : [(1,6,3)],
"TIM2_CH3" : [(1,1,3)],
"TIM2_CH4" : [(1,6,3),(1,7,3)],
"TIM2_UP" : [(1,1,3),(1,7,3)],
"TIM3_CH1" : [(1,4,5)],
"TIM3_CH2" : [(1,5,5)],
"TIM3_CH3" : [(1,7,5)],
"TIM3_CH4" : [(1,2,5)],
"TIM3_TRIG" : [(1,4,5)],
"TIM3_UP" : [(1,2,5)],
"TIM4_CH1" : [(1,0,2)],
"TIM4_CH2" : [(1,3,2)],
"TIM4_CH3" : [(1,7,2)],
"TIM4_UP" : [(1,6,2)],
"TIM5_CH1" : [(1,2,6)],
"TIM5_CH2" : [(1,4,6)],
"TIM5_CH3" : [(1,0,6)],
"TIM5_CH4" : [(1,1,6),(1,3,6)],
"TIM5_TRIG" : [(1,1,6),(1,3,6)],
"TIM5_UP" : [(1,0,6),(1,6,6)],
"USART1_RX" : [(2,2,4),(2,5,4)],
"USART1_TX" : [(2,7,4)],
"USART2_RX" : [(1,5,4)],
"USART2_TX" : [(1,6,4)],
}
I registered DMA, ADC and PINs in it… well, I wrote as much as I could, at least the command
./waf configure --board Stm32f411ccu6 -v
It didn’t show any errors.
My problem remains the incomprehensible situation with the processor frequency, clocks and voltage.
I can’t edit the file correctly
stm32f47_mcuconf.h
And the meaning
OSCILLATOR_HZ 10000000
Which the file needs
hal_lld_type1.h
Console command
python3 ./Tools/scripts/build_bootloaders.py Stm32f411ccu6
It produces errors like this
Building for Stm32f411ccu6
Running (./waf configure --board Stm32f411ccu6 --bootloader --no-submodule-update --Werror)
Setting top to : /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot
Setting out to : /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build
Autoconfiguration : enabled
Checking for program 'python' : /usr/bin/python3
Checking for python version >= 3.6.9 : 3.10.12
Setting board to : Stm32f411ccu6
Using toolchain : arm-none-eabi
Checking for 'g++' (C++ compiler) : /usr/bin/arm-none-eabi-g++
Checking for 'gcc' (C compiler) : /usr/bin/arm-none-eabi-gcc
Checking for program 'arm-none-eabi-nm' : /usr/bin/arm-none-eabi-nm
Checking for c flags '-MMD' : yes
Checking for cxx flags '-MMD' : yes
CXX Compiler : g++ 10.3.1
Checking for program 'make' : /usr/bin/make
Checking for program 'arm-none-eabi-objcopy' : /usr/bin/arm-none-eabi-objcopy
Setup for MCU STM32F411xE
Writing hwdef setup in /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/hwdef.h
Writing DMA map
Setting up as bootloader
Generating ldscript.ld
Checking for env.py
env set ENABLE_DFU_BOOT=0
env set PROCESS_STACK=0x1C00
env set MAIN_STACK=0x600
env set IOMCU_FW=0
env set PERIPH_FW=0
env set BOARD_FLASH_SIZE=512
env set EXT_FLASH_SIZE_MB=0
env set INT_FLASH_PRIMARY=False
env set ENABLE_CRASHDUMP=False
env set CPU_FLAGS=['-mcpu=cortex-m4', '-mfpu=fpv4-sp-d16', '-mfloat-abi=hard']
env set CORTEX=cortex-m4
env set APJ_BOARD_ID=5502
env set APJ_BOARD_TYPE=STM32F411xE
env set USBID=0x1209/0x5741
env set FLASH_RESERVE_START_KB=64
env set EXT_FLASH_RESERVE_START_KB=0
env set FLASH_TOTAL=65536
env set HAS_EXTERNAL_FLASH_SECTIONS=0
env set CHIBIOS_BUILD_FLAGS=USE_FATFS=no CHIBIOS_STARTUP_MK=os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk CHIBIOS_PLATFORM_MK=os/hal/ports/STM32/STM32F4xx/platform.mk MCU=cortex-m4
Enabling ChibiOS asserts : no
Disabling Watchdog : no
Enabling malloc guard : no
Enabling ChibiOS thread statistics : no
Enabling -Werror : yes
Checking for intelhex module: : OK
Enabled OpenDroneID : no
Enabled firmware ID checking : no
GPS Debug Logging : no
Enabled custom controller : no
Checking for HAVE_CMATH_ISFINITE : yes
Checking for HAVE_CMATH_ISINF : yes
Checking for HAVE_CMATH_ISNAN : yes
Checking for NEED_CMATH_ISFINITE_STD_NAMESPACE : yes
Checking for NEED_CMATH_ISINF_STD_NAMESPACE : yes
Checking for NEED_CMATH_ISNAN_STD_NAMESPACE : yes
Checking for header endian.h : not found
Checking for header byteswap.h : not found
Checking for HAVE_MEMRCHR : no
Configured VSCode Intellisense: : no
DC_DSDL compiler : /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/modules/DroneCAN/dronecan_dsdlc/dronecan_dsdlc.py
Source is git repository : yes
Update submodules : no
Checking for program 'git' : /usr/bin/git
Gtest : STM32 boards currently don't support compiling gtest
Checking for program 'arm-none-eabi-size' : /usr/bin/arm-none-eabi-size
Benchmarks : disabled
Unit tests : disabled
Scripting : disabled
Scripting runtime checks : enabled
Debug build : disabled
Coverage build : disabled
Force 32-bit build : disabled
Checking for program 'rsync' : /usr/bin/rsync
Removing target_list file /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/target_list
'configure' finished successfully (2.090s)
Running (./waf clean)
'clean' finished successfully (5.721s)
Running (./waf bootloader)
Waf: Entering directory `/mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6'
Checking for env.py
No env.py found
Generating hwdef.h
Setup for MCU STM32F411xE
Writing hwdef setup in /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/hwdef.h
Writing DMA map
Setting up as bootloader
Generating ldscript.ld
Embedding file hwdef.dat:/mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/hw.dat
[1/7] Creating build/Stm32f411ccu6/hwdef.h
[2/7] Creating build/Stm32f411ccu6/modules/ChibiOS/include_dirs
[3/7] Compiling libraries/AP_Scripting/generator/src/main.c
[4/7] Creating build/Stm32f411ccu6/ap_version.h
[5/7] Creating build/Stm32f411ccu6/chibios_flags.h
Setup for MCU STM32F411xE
Writing hwdef setup in /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/hwdef.h
Writing DMA map
Setting up as bootloader
No change in hwdef.h
Generating ldscript.ld
[6/7] Processing /mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/libraries/AP_Scripting/lua_generated_bindings.cpp,/mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6/libraries/AP_Scripting/lua_generated_bindings.h: libraries/AP_Scripting/generator/description/bindings.desc build/Stm32f411ccu6/gen-bindings -> build/Stm32f411ccu6/libraries/AP_Scripting/lua_generated_bindings.cpp build/Stm32f411ccu6/libraries/AP_Scripting/lua_generated_bindings.h
[7/7] Linking build/Stm32f411ccu6/modules/ChibiOS/libch.a
[1/107] ChibiOS: Compiling crt0_v7m.S
[2/107] ChibiOS: Compiling vectors.S
[3/107] ChibiOS: Compiling chcoreasm.S
[4/107] ChibiOS: Compiling chcore.c
[5/107] ChibiOS: Compiling crt1.c
[6/107] ChibiOS: Compiling bufstreams.c
[7/107] ChibiOS: Compiling chprintf.c
[8/107] ChibiOS: Compiling chscanf.c
[9/107] ChibiOS: Compiling memstreams.c
[10/107] ChibiOS: Compiling nullstreams.c
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h:55,
from ../../libraries/AP_HAL_ChibiOS/hwdef/common/halconf.h:48,
from ../../modules/ChibiOS/os/hal/include/hal.h:32,
from ../../modules/ChibiOS/os/hal/lib/streams/chprintf.c:31:
../../libraries/AP_HAL_ChibiOS/hwdef/common/stm32f47_mcuconf.h:197:2: error: #error "Unsupported F4 HSE clock"
197 | #error "Unsupported F4 HSE clock"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:33,
from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/chprintf.c:31:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1595:2: error: #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
1595 | #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1615:2: error: #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
1615 | #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1696:2: error: #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
1696 | #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1720:2: error: #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
1720 | #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1744:2: error: #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
1744 | #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/chprintf.c:31:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:261:2: error: #error "invalid frequency at specified VDD level"
261 | #error "invalid frequency at specified VDD level"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal_usb.h:373,
from ../../modules/ChibiOS/os/hal/include/hal.h:334,
from ../../modules/ChibiOS/os/hal/lib/streams/chprintf.c:31:
../../modules/ChibiOS/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h:246:2: error: #error "the USB OTG driver requires a 48MHz clock"
246 | #error "the USB OTG driver requires a 48MHz clock"
| ^~~~~
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h:55,
from ../../libraries/AP_HAL_ChibiOS/hwdef/common/halconf.h:48,
from ../../modules/ChibiOS/os/hal/include/hal.h:32,
from ../../modules/ChibiOS/os/hal/lib/streams/chscanf.c:32:
../../libraries/AP_HAL_ChibiOS/hwdef/common/stm32f47_mcuconf.h:197:2: error: #error "Unsupported F4 HSE clock"
197 | #error "Unsupported F4 HSE clock"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:33,
from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/chscanf.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1595:2: error: #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
1595 | #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1615:2: error: #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
1615 | #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1696:2: error: #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
1696 | #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1720:2: error: #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
1720 | #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1744:2: error: #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
1744 | #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
| ^~~~~
make: *** [../../libraries/AP_HAL_ChibiOS/hwdef/common/chibios_common.mk:243: modules/ChibiOS/obj/chprintf.o] Error 1
make: *** Waiting for unfinished jobs....
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h:55,
from ../../libraries/AP_HAL_ChibiOS/hwdef/common/halconf.h:48,
from ../../modules/ChibiOS/os/hal/include/hal.h:32,
from ../../modules/ChibiOS/os/hal/lib/streams/bufstreams.c:32:
../../libraries/AP_HAL_ChibiOS/hwdef/common/stm32f47_mcuconf.h:197:2: error: #error "Unsupported F4 HSE clock"
197 | #error "Unsupported F4 HSE clock"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:33,
from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/bufstreams.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1595:2: error: #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
1595 | #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1615:2: error: #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
1615 | #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1696:2: error: #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
1696 | #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1720:2: error: #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
1720 | #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1744:2: error: #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
1744 | #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/chscanf.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:261:2: error: #error "invalid frequency at specified VDD level"
261 | #error "invalid frequency at specified VDD level"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/bufstreams.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:261:2: error: #error "invalid frequency at specified VDD level"
261 | #error "invalid frequency at specified VDD level"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal_usb.h:373,
from ../../modules/ChibiOS/os/hal/include/hal.h:334,
from ../../modules/ChibiOS/os/hal/lib/streams/chscanf.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h:246:2: error: #error "the USB OTG driver requires a 48MHz clock"
246 | #error "the USB OTG driver requires a 48MHz clock"
| ^~~~~
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h:55,
from ../../libraries/AP_HAL_ChibiOS/hwdef/common/halconf.h:48,
from ../../modules/ChibiOS/os/hal/include/hal.h:32,
from ../../modules/ChibiOS/os/hal/lib/streams/nullstreams.c:26:
../../libraries/AP_HAL_ChibiOS/hwdef/common/stm32f47_mcuconf.h:197:2: error: #error "Unsupported F4 HSE clock"
197 | #error "Unsupported F4 HSE clock"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal_usb.h:373,
from ../../modules/ChibiOS/os/hal/include/hal.h:334,
from ../../modules/ChibiOS/os/hal/lib/streams/bufstreams.c:32:
../../modules/ChibiOS/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h:246:2: error: #error "the USB OTG driver requires a 48MHz clock"
246 | #error "the USB OTG driver requires a 48MHz clock"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:33,
from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/nullstreams.c:26:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1595:2: error: #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
1595 | #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1615:2: error: #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
1615 | #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1696:2: error: #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
1696 | #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1720:2: error: #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
1720 | #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1744:2: error: #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
1744 | #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
| ^~~~~
make: *** [../../libraries/AP_HAL_ChibiOS/hwdef/common/chibios_common.mk:243: modules/ChibiOS/obj/chscanf.o] Error 1
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h:55,
from ../../libraries/AP_HAL_ChibiOS/hwdef/common/halconf.h:48,
from ../../modules/ChibiOS/os/hal/include/hal.h:32,
from ../../modules/ChibiOS/os/hal/lib/streams/memstreams.c:28:
../../libraries/AP_HAL_ChibiOS/hwdef/common/stm32f47_mcuconf.h:197:2: error: #error "Unsupported F4 HSE clock"
197 | #error "Unsupported F4 HSE clock"
| ^~~~~
make: *** [../../libraries/AP_HAL_ChibiOS/hwdef/common/chibios_common.mk:243: modules/ChibiOS/obj/bufstreams.o] Error 1
In file included from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/nullstreams.c:26:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:261:2: error: #error "invalid frequency at specified VDD level"
261 | #error "invalid frequency at specified VDD level"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:33,
from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/memstreams.c:28:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1595:2: error: #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
1595 | #error "STM32_PLLCLKOUT outside acceptable range (STM32_PLLOUT_MIN...STM32_PLLOUT_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1615:2: error: #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
1615 | #error "STM32_SYSCLK above maximum rated frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1696:2: error: #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
1696 | #error "STM32_HCLK exceeding maximum frequency (STM32_SYSCLK_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1720:2: error: #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
1720 | #error "STM32_PCLK1 exceeding maximum frequency (STM32_PCLK1_MAX)"
| ^~~~~
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h:1744:2: error: #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
1744 | #error "STM32_PCLK2 exceeding maximum frequency (STM32_PCLK2_MAX)"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal.h:257,
from ../../modules/ChibiOS/os/hal/lib/streams/memstreams.c:28:
../../modules/ChibiOS/os/hal/ports/STM32/STM32F4xx/hal_lld.h:261:2: error: #error "invalid frequency at specified VDD level"
261 | #error "invalid frequency at specified VDD level"
| ^~~~~
In file included from ../../modules/ChibiOS/os/hal/include/hal_usb.h:373,
from ../../modules/ChibiOS/os/hal/include/hal.h:334,
from ../../modules/ChibiOS/os/hal/lib/streams/nullstreams.c:26:
../../modules/ChibiOS/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h:246:2: error: #error "the USB OTG driver requires a 48MHz clock"
246 | #error "the USB OTG driver requires a 48MHz clock"
| ^~~~~
make: *** [../../libraries/AP_HAL_ChibiOS/hwdef/common/chibios_common.mk:243: modules/ChibiOS/obj/nullstreams.o] Error 1
In file included from ../../modules/ChibiOS/os/hal/include/hal_usb.h:373,
from ../../modules/ChibiOS/os/hal/include/hal.h:334,
from ../../modules/ChibiOS/os/hal/lib/streams/memstreams.c:28:
../../modules/ChibiOS/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h:246:2: error: #error "the USB OTG driver requires a 48MHz clock"
246 | #error "the USB OTG driver requires a 48MHz clock"
| ^~~~~
make: *** [../../libraries/AP_HAL_ChibiOS/hwdef/common/chibios_common.mk:243: modules/ChibiOS/obj/memstreams.o] Error 1
No target_list file found, creating
Generating compile_commands.json
Build commands will be stored in build/Stm32f411ccu6/compile_commands.json
Generating compile_commands.json
Build commands will be stored in build/Stm32f411ccu6/compile_commands.json
Waf: Leaving directory `/mnt/c/Users/name/Documents/Arduino/libraries/ardupilot/build/Stm32f411ccu6'
Build failed
-> task in 'ChibiOS_lib' failed (exit status 2):
{task 139798791369808: ChibiOS_lib hwdef.h,hw.dat,ldscript.ld,common.ld,include_dirs,board.c,board.h,bouncebuffer.c,bouncebuffer.h,chconf.h,crashdump.c,ffconf.h,flash.c,flash.h,halconf.h,hrt.c,hrt.h,malloc.c,mcuconf.h,poll.h,ppm.h,spi_hook.h,stdio.h,stm32_util.c,stm32_util.h,stm32f1_mcuconf.h,stm32f3_mcuconf.h,stm32f47_mcuconf.h,stm32g4_mcuconf.h,stm32h7_A3_mcuconf.h,stm32h7_mcuconf.h,stm32h7_type2_mcuconf.h,stm32l4+_mcuconf.h,stm32l4_mcuconf.h,stubs.c,usbcfg.c,usbcfg.h,usbcfg_common.c,usbcfg_dualcdc.c,watchdog.c,watchdog.h,chibios_board.mk,chibios_common.mk,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,buzzer.c,buzzer.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,board.c,board.h,hal.h,hal_adc.h,hal_buffered_serial.h,hal_buffers.h,hal_can.h,hal_channels.h,hal_crypto.h,hal_dac.h,hal_efl.h,hal_eicu.h,hal_files.h,hal_flash.h,hal_gpt.h,hal_i2c.h,hal_i2s.h,hal_icu.h,hal_ioblock.h,hal_mac.h,hal_mii.h,hal_mmc_spi.h,hal_mmcsd.h,hal_objects.h,hal_pal.h,hal_persistent.h,hal_pwm.h,hal_queues.h,hal_rtc.h,hal_sdc.h,hal_serial.h,hal_serial_usb.h,hal_sio.h,hal_spi.h,hal_spi_v1.h,hal_spi_v2.h,hal_st.h,hal_streams.h,hal_trng.h,hal_uart.h,hal_usb.h,hal_usb_cdc.h,hal_usb_msd.h,hal_wdg.h,hal_wspi.h,hal_buffered_sio.c,hal_buffered_sio.h,hal_mfs.c,hal_mfs.h,hal_flash_device.c,hal_flash_device.h,hal_flash_device.c,hal_flash_device.h,hal_serial_nor.c,hal_serial_nor.h,hal_i2c_lld.c,hal_i2c_lld.h,bufstreams.c,bufstreams.h,chprintf.c,chprintf.h,chscanf.c,chscanf.h,memstreams.c,memstreams.h,nullstreams.c,nullstreams.h,osal_vt.c,osal_vt.h,osal.c,osal.h,osal.c,osal.h,chcore_timer.h,osal.c,osal.h,osal.c,osal.h,aducm_cc.h,aducm_gp.h,aducm_isr.c,aducm_isr.h,aducm_registry.h,hal_lld.c,hal_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_st_lld.c,hal_st_lld.h,aducm_uart.h,hal_serial_lld.c,hal_serial_lld.h,aducm_wut.h,hal_st_lld.c,hal_st_lld.h,avr_pins.h,avr_timers.h,hal_lld.c,hal_lld.h,hal_adc_lld.c,hal_adc_lld.h,hal_ext_lld.c,hal_ext_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_st_lld.c,hal_st_lld.h,hal_gpt_lld.c,hal_gpt_lld.h,hal_icu_lld.c,hal_icu_lld.h,hal_pwm_lld.c,hal_pwm_lld.h,hal_st_lld.c,hal_st_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_usb_lld.c,hal_usb_lld.h,hal_lld.c,hal_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_st_lld.c,hal_st_lld.h,hal_st_lld.c,hal_st_lld.h,hal_uart_lld.c,hal_uart_lld.h,avr_pins.h,avr_timers.h,hal_lld.c,hal_lld.h,hal_crc.c,hal_crc.h,hal_crc_lld.c,hal_crc_lld.h,xmega_crc.h,hal_crypto_lld.c,hal_crypto_lld.h,hal_dac_lld.c,hal_dac_lld.h,xmega_dma_lld.c,xmega_dma_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_st_lld.c,hal_st_lld.h,hal_st_lld.c,hal_st_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_uart_lld.c,hal_uart_lld.h,hal_wdg_lld.c,hal_wdg_lld.h,hal_lld.c,hal_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_st_lld.c,hal_st_lld.h,vic.c,vic.h,rp_dma.c,rp_dma.h,hal_pal_lld.c,hal_pal_lld.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_rtc_lld.c,hal_rtc_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_st_lld.c,hal_st_lld.h,hal_sio_lld.c,hal_sio_lld.h,hal_wdg_lld.c,hal_wdg_lld.h,hal_lld.c,hal_lld.h,rp_fifo.h,rp_isr.c,rp_isr.h,rp_registry.h,hal_spi_lld.c,hal_spi_lld.h,spc5_dspi.h,spc5_edma.c,spc5_edma.h,hal_serial_lld.c,hal_serial_lld.h,hal_serial_lld.c,hal_serial_lld.h,spc5_linflex.h,hal_pal_lld.c,hal_pal_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_st_lld.c,hal_st_lld.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc560bc.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc560b.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc560d.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc560p.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc563m.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc564a.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc56ec.h,hal_lld.c,hal_lld.h,registers.h,spc5_registry.h,typedefs.h,xpc56el.h,hal_adc_lld.c,hal_adc_lld.h,hal_adc_lld.c,hal_adc_lld.h,hal_adc_lld.c,hal_adc_lld.h,hal_adc_lld.c,hal_adc_lld.h,hal_adc_lld.c,hal_adc_lld.h,stm32_bdma.c,stm32_bdma.h,hal_can_lld.c,hal_can_lld.h,hal_crypto_lld.c,hal_crypto_lld.h,hal_dac_lld.c,hal_dac_lld.h,stm32_dma.c,stm32_dma.h,stm32_dma.c,stm32_dma.h,stm32_exti.c,stm32_exti.h,hal_can_lld.c,hal_can_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_pal_lld.c,hal_pal_lld.h,stm32_gpio.h,hal_pal_lld.c,hal_pal_lld.h,stm32_gpio.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_mac_lld.c,hal_mac_lld.h,hal_mac_lld.c,hal_mac_lld.h,stm32_mdma.c,stm32_mdma.h,hal_wspi_lld.c,hal_wspi_lld.h,hal_wspi_lld.c,hal_wspi_lld.h,hal_usb_lld.c,hal_usb_lld.h,stm32_otg.h,hal_wspi_lld.c,hal_wspi_lld.h,hal_wspi_lld.c,hal_wspi_lld.h,hal_trng_lld.c,hal_trng_lld.h,hal_rtc_lld.c,hal_rtc_lld.h,hal_rtc_lld.c,hal_rtc_lld.h,hal_rtc_lld.c,hal_rtc_lld.h,hal_sdc_lld.c,hal_sdc_lld.h,hal_sdc_lld.c,hal_sdc_lld.h,hal_sdc_lld.c,hal_sdc_lld.h,hal_i2s_lld.c,hal_i2s_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_spi_v2_lld.c,hal_spi_v2_lld.h,hal_i2s_lld.c,hal_i2s_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_spi_v2_lld.c,hal_spi_v2_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_spi_v2_lld.c,hal_spi_v2_lld.h,hal_st_lld.c,hal_st_lld.h,hal_st_lld.c,hal_st_lld.h,hal_eicu_lld.c,hal_eicu_lld.h,hal_gpt_lld.c,hal_gpt_lld.h,hal_icu_lld.c,hal_icu_lld.h,hal_pwm_lld.c,hal_pwm_lld.h,stm32_tim.h,hal_serial_lld.c,hal_serial_lld.h,hal_uart_lld.c,hal_uart_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_sio_lld.c,hal_sio_lld.h,hal_uart_lld.c,hal_uart_lld.h,stm32_usart.h,hal_serial_lld.c,hal_serial_lld.h,hal_sio_lld.c,hal_sio_lld.h,hal_uart_lld.c,hal_uart_lld.h,stm32_usart.h,hal_usb_lld.c,hal_usb_lld.h,stm32_usb.h,hal_usb_lld.c,hal_usb_lld.h,hal_wdg_lld.c,hal_wdg_lld.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_adc_lld.c,hal_adc_lld.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,hal_lld_f100.h,hal_lld_f103.h,hal_lld_f105_f107.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_adc_lld.c,hal_adc_lld.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,hal_lld_type1.h,hal_lld_type2.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,hal_lld_type1.h,hal_lld_type2.h,hal_lld_type3.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_adc_lld.c,hal_adc_lld.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,hal_efl_lld.c,hal_efl_lld.h,hal_lld.c,hal_lld.h,stm32_dmamux.h,stm32_isr.c,stm32_isr.h,stm32_rcc.h,stm32_registry.h,cache.h,mpu_v7m.h,nvic.c,nvic.h,sau.c,sau.h,hal_lld.c,hal_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_sio_lld.c,hal_sio_lld.h,hal_st_lld.c,hal_st_lld.h,console.c,console.h,hal_pal_lld.c,hal_pal_lld.h,hal_st_lld.c,hal_st_lld.h,hal_lld.c,hal_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_lld.c,hal_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal.c,hal_adc.c,hal_buffered_serial.c,hal_buffers.c,hal_can.c,hal_crypto.c,hal_dac.c,hal_efl.c,hal_eicu.c,hal_flash.c,hal_gpt.c,hal_i2c.c,hal_i2s.c,hal_icu.c,hal_mac.c,hal_mmc_spi.c,hal_mmcsd.c,hal_pal.c,hal_pwm.c,hal_queues.c,hal_rtc.c,hal_sdc.c,hal_serial.c,hal_serial_usb.c,hal_sio.c,hal_spi.c,hal_st.c,hal_trng.c,hal_uart.c,hal_usb.c,hal_usb_msd.c,hal_wdg.c,hal_wspi.c,board.c,board.h,hal_adc_lld.c,hal_adc_lld.h,hal_can_lld.c,hal_can_lld.h,hal_crypto_lld.c,hal_crypto_lld.h,hal_dac_lld.c,hal_dac_lld.h,hal_efl_lld.c,hal_efl_lld.h,hal_gpt_lld.c,hal_gpt_lld.h,hal_i2c_lld.c,hal_i2c_lld.h,hal_i2s_lld.c,hal_i2s_lld.h,hal_icu_lld.c,hal_icu_lld.h,hal_lld.c,hal_lld.h,hal_mac_lld.c,hal_mac_lld.h,hal_pal_lld.c,hal_pal_lld.h,hal_pwm_lld.c,hal_pwm_lld.h,hal_rtc_lld.c,hal_rtc_lld.h,hal_sdc_lld.c,hal_sdc_lld.h,hal_serial_lld.c,hal_serial_lld.h,hal_sio_lld.c,hal_sio_lld.h,hal_spi_lld.c,hal_spi_lld.h,hal_spi_v2_lld.c,hal_spi_v2_lld.h,hal_st_lld.c,hal_st_lld.h,hal_trng_lld.c,hal_trng_lld.h,hal_uart_lld.c,hal_uart_lld.h,hal_usb_lld.c,hal_usb_lld.h,hal_wdg_lld.c,hal_wdg_lld.h,hal_wspi_lld.c,hal_wspi_lld.h,halconf.h,mcuconf.h,osal.c,osal.h,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,board.mk,hal.mk,hal_buffered_sio.mk,hal_mfs.mk,hal_flash_device.mk,hal_flash_device.mk,streams.mk,osal.mk,osal.mk,osal.mk,osal.mk,platform.mk,driver.mk,driver.mk,platform.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,platform.mk,driver.mk,driver.mk,driver.mk,driver.mk,platform.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,platform.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver_v2.mk,driver.mk,driver_v2.mk,driver.mk,driver_v2.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,driver.mk,platform.mk,platform.mk,platform_f105_f107.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform_type2.mk,platform.mk,platform.mk,platform.mk,platform_l412_l422.mk,platform_l432.mk,platform.mk,platform_l4p5_l4q5.mk,platform.mk,platform.mk,platform.mk,platform.mk,platform_v2.mk,platform.mk,platform.mk,platform.mk,board.mk,osal.mk,platform.mk,ap_romfs_embedded.h -> libch.a}
(run with -v to display more information)
Build failed: ./waf bootloader
Failed boards: ['Stm32f411ccu6']
I hope that there will be someone who can help me.
l